1. Technical Field
The present invention relates to equipment used in a semiconductor device fabrication process, and more particularly, to heat treatment equipment for processing a substrate such as a wafer through a heat treatment process.
2. Discussion of the Related Art
Technology for semiconductor products continues to rapidly develop. Parameters of these semiconductor products, such as a processing speed and an amount of data stored per volume, have improved with the technology.
Generally, semiconductor products are manufactured by the following processes: a wafer fabrication process of fabricating a wafer using pure silicon, a FAB process of fabricating semiconductor chips on the manufactured wafer, an EDS process of testing and repairing the fabricated semiconductor chips, and a packaging process of packaging the tested and repaired semiconductor chips.
Among the aforementioned processes, the FAB process may include a number of unit processes such as an oxidation process of forming a silicon oxide layer on a wafer, a photoresist coating process of coating the wafer with photoresist as a photosensitive agent, an exposure process of exposing the coated wafer to a light having a predetermined wavelength so that a certain pattern is transmitted on the coated photoresist, a photoresist bake process of baking the coated photoresist, a development process of developing the exposed pattern on the wafer, an etching process of etching a part or the whole of a thin film formed on the wafer, a deposition process of depositing a predetermined thin film on the wafer, an ion-implantation process of implanting impurities in a specific layer on the wafer, an anneal process of activating the impurities, and a diffusion process of diffusing the impurities in silicon.
The EDS process includes a number of unit processes such as a pre-laser process of generating data by testing semiconductor chips within the wafer and distinguishing good or bad semiconductor chips, a laser-repair process of repairing the semiconductor chips to be repaired based on the generated data by using a laser beam, a post-laser process of testing the repaired semiconductor chips in the wafer, a back grinding process of polishing the rear side of the wafer, a protection layer coating process of coating the semiconductor chips in the wafer with a protection layer such as a polyimide layer, and a protection layer bake process of baking the protection layer such as the coated polyimide layer.
Among the aforementioned unit processes, the oxidation process, the photoresist bake process, the deposition process, the anneal process, the diffusion process, and the protection layer bake process are performed by a heat treatment process. The heat treatment equipment to perform the heat treatment process falls into two categories; a single wafer type and a batch type.
The batch type generally includes horizontal and vertical furnace equipment. The vertical furnace equipment in the batch type is generally used because it has many merits such as high productivity and reliability.
Among the unit processes performed by the heat treatment process, the protection layer bake process is performed after pads formed in the semiconductor chips are bonded to lead frames. And this is done before the packaging process of enclosing the pads with epoxy molding compound.
The protection layer bake process is generally performed by loading a number of wafers a sealed tube, and heating the tube to about 250° C.˜350° C. for about 2˜3 hours. During the protection layer bake process, nitrogen (N2) gas is continuously supplied into the tube as a process gas as a part of the ambient condition inside the tube.
Since various bad gases, including a silicon source out-gassing from the wafer, may be generated inside the tube during the protection layer bake process, the tube is typically connected to an exhaust duct positioned inside a clean room, so that the bad gases are continuously discharged to the outside.
However, in a conventional protection layer bake process, since the tube subjected to the bake process is directly connected to the exhaust duct, the gases present within the tube are rapidly discharged through the exhaust duct during the bake process. As a result, the pressure inside the tube is continuously maintained to be lower (hereinafter, referred to as “negative pressure”) than the pressure inside the clean room in which the heat treatment equipment is positioned.
Consequently, since the pressure inside the tube is maintained at a negative pressure while the protection layer bake process is performed, an oxidant, such as O2 or H2O, present in the clean room flows into the tube due to the pressure difference between the clean room and the tube, even though the tube is sealed. As a result, the oxidant flowing into the inside of the tube interacts with the silicon source out-gassing from the wafers, causing an abnormal layer such as a silicon oxide layer (SiO2) to grow on the pads formed in the semiconductor chips on the wafers. Consequently, the abnormal layer, such as the silicon oxide layer formed on the pads, acts as an element to deteriorate the wire bonding which connects the pads to the lead frames, and this may cause a malfunction or performance deterioration of packaged semiconductor products.